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STR720 Arkusz danych(PDF) 186 Page - STMicroelectronics

Numer części STR720
Szczegółowy opis  ARM720T 16/32-BIT MCU WITH 16K RAM, USB, CAN, 3 TIMERS, ADC, 6 COMMUNICATIONS INTERFACES
PDF  401 Pages
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STR720 Arkusz danych(HTML) 186 Page - STMicroelectronics

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STR720 - BUFFERED SPI (BSPI)
186/401
17 BUFFERED SPI (BSPI)
17.1 Introduction
The BSPI block is a standard 4-pin Serial Peripheral Interface for serial control
communication. It interfaces on one side to the SPI bus and on the other has a standard
register data and interrupt interface.
The BSPI contains two 16-word x 16-bit FIFO’s one for receive and the other for transmit. The
BSPI can directly operate with words 8 and 16 bit long and can generates interrupts or DMA
requests separately for receive and transmit events.
17.2 Main Features
Programmable depth receive FIFO.
Maximum 16 word Receive FIFO.
Programmable depth transmit FIFO.
Maximum 16 word Transmit FIFO.
Master and Slave modes supported.
Internal clock prescaler.
Programmable DMA interface
17.3 Functional Description
The processor views the BSPI as a memory mapped peripheral, which may be used by
standard
polling,
interrupt
programming
techniques
or
DMA
controlled
access.
Memory-mapping means processor communication can be achieved using standard
instructions and addressing modes.
When an SPI transfer occurs data is transmitted and received simultaneously. A serial clock
line synchronizes shifting and sampling of the information on the two serial data lines. A slave
select line allows individual selection of a slave device. The central elements in the BSPI
system are the 16-bit shift register and the read data buffer which is 16 words x 16-bit.A
BSPI-DMA interface is also present to allow for data to be transferred to/from memory using
the DMA.A block diagram of the BSPI is shown in Figure 23 on page 187.
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