ADV7183ABST datasheet(13/104 Pages) AD

13 / 104 page

ADV7183A

Rev. A | Page 13 of 104

ANALOG FRONT END

ANALOG INPUT MUXING

AIN1

AIN7

AIN2

AIN8

AIN3

AIN9

AIN4

AIN10

AIN5

AIN11

AIN6

AIN12

AIN3

AIN9

AIN4

AIN10

AIN5

AIN11

AIN6

AIN12

AIN2

AIN8

AIN5

AIN11

AIN6

AIN12

ADC_SW_MAN_EN

INSEL[3:0]

ADC0_SW[3:0]

ADC1_SW[3:0]

INTERNAL

MAPPING

FUNCTIONS

ADC2

ADC1

ADC0

Figure 6. Internal Pin Connections

The ADV7183A has an integrated analog muxing section that

allows more than one source of video signal to be connected to

the decoder. Figure 6 outlines the overall structure of the input

muxing provided in the ADV7183A.

As can be seen in Figure 6, there are two different ways in which

the analog input muxes can be controlled:

Control via functional registers (INSEL).

Using INSEL[3:0] simplifies the setup of the muxes, and

minimizes crosstalk between channels by pre-assigning the

input channels. This is referred to as ADI recommended

input muxing.

Control via an I2C manual override

(ADC_sw_man_en, ADC0_sw, ADC1_sw, ADC2_sw).

This is provided for applications with special requirements

(e.g., number/combinations of signals) that would not be

served by the pre-assigned input connections. This is

referred to as manual input muxing.

Please refer to Figure 7 for an overview of the two methods of

controlling the ADV7183A’s input muxing.

ADI Recommended Input Muxing

A maximum of 12 CVBS inputs can be connected and decoded

by the ADV7183A. As can be seen from Figure 5, this means the

sources will have to be connected to adjacent pins on the IC.

This calls for a careful design of the PCB layout (e.g., ground

shielding between all signals routed through tracks that are

physically close together).

INSEL[3:0] Input Selection, Address 0x00, [3:0]

The INSEL bits allow the user to select an input channel as well

as the input format. Depending on the PCB connections, only a

subset of the INSEL modes are valid. Please note that the

INSEL[3:0] does not only switch the analog input muxing, it

also configures the standard definition processor core to

process CVBS (Comp), S-video (Y/C), or component (YPbPr)

format.

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