AM386SX datasheet(29/30 Pages) AMD

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Am386SX/SXL/SXLV Microprocessors Data Sheet

PACKAGE THERMAL SPECIFICATIONS

The Am386SX/SXL/SXLV processors are specified for

operation when TCASE (the case temperature) is within

the range of 0

°C to +100°C for commercial parts, and

–40°C to +100°C for industrial parts. TCASE can be mea-

sured in any environment to determine whether the

Am386SX/SXL/SXLV processors are within the speci-

fied operating range. The case temperature should be

measured at the center of the top surface opposite the

pins.

The ambient temperature (TA) is guaranteed as long as

TCASE is not violated. The ambient temperature can be

calculated from

JC and θJA and from these equations:

TJ = TCASE + P • θJC

TA = TJ – P • θJA

TCASE = TA + P • [θJA – θJC]

where:

TJ, TA, TCASE = Junction, Ambient, and Case Temperature

JC, θJA

= Junction-to-Case and Junction-to-Ambient

Thermal Resistance, respectively

= Maximum Power Consumption

In the 100-lead PQFP package,

JA=45.0 and θJC=11.0.

ELECTRICAL SPECIFICATIONS

The Am386SX/SXL/SXLV CPU has modest power re-

quirements. However, its high clock frequency and 47

output buffers (address, data, control, and HLDA) can

cause power surges as multiple output buffers drive

new signal levels simultaneously. For clean on-chip

power distribution at high frequency, 14 VCC and

18 VSS pins separately feed functional units of the

Am386SX/SXL/SXLV CPU.

Power and ground connections must be made to all ex-

ternal VCC and VSS pins of the Am386SX/SXL/SXLV

CPU. On the circuit board, all VCC pins should be con-

nected on a VCC plane, and VSS pins should be con-

nected on a GND plane.

Power Decoupling Recommendations

Liberal decoupling capacitors should be placed near

the Am386SX/SXL/SXLV CPU. The Am386SX/SXL/

SXLV CPU driving its 24-bit address bus and 16-bit

data bus at high frequencies can cause transient power

surges, particularly when driving large capacitive

loads. Low inductance capacitors and interconnects

are recommended for best high frequency electrical

performance. Inductance can be reduced by shorten-

ing circuit board traces between the Am386SX/SXL/

SXLV CPU and decoupling capacitors as much as pos-

sible.

Resistor Recommendations

The ERROR, FLT, and BUSY inputs have internal pull-

up resistors of approximately 20 Kohms, and the

PEREQ input has an internal pull-down resistor of ap-

proximately 20 Kohms, built into the Am386SX/SXL/

SXLV CPU to keep these signals inactive when a

387SX-compatible math coprocessor is not present in

the system (or temporarily removed from its socket).

In typical designs, the external pull-up resistors shown

in Table 1 are recommended. However, a particular de-

sign may have reason to adjust the resistor values rec-

ommended here, or alter the use of pull-up resistors in

other ways.

Other Connection Recommendations

For reliable operation, always connect unused inputs to

an appropriate signal level. NC pins should always re-

main unconnected. Connection of NC pins to VCC or

VSS will result in component malfunction or incompati-

bility with future steppings of the Am386SX/SXL/SXLV

CPU.

Particularly when not using the interrupts or bus hold

(as when first prototyping), prevent any chance of spu-

rious activity by connecting these associated inputs to

GND:

Signal

INTR

NMI

4HOLD

If not using address pipelining, connect pin 6 (NA)

through a pull-up in the range of 20 Kohms to VCC.

Table 1.

Recommended Resistor Pull-Ups to VCC

Signal

Pull-Up Value

Purpose

ADS

20 Kohms ± 10%

Lightly pull ADS inactive during Am386SX/SXL/SXLV

CPU Hold Acknowledge states.

LOCK

20 Kohms ± 10%

Lightly pull LOCK inactive during Am386SX/SXL/

SXLV CPU Hold Acknowledge states.

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