AM79C930 datasheet(38/161 Pages) AMD

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AMD

P R E L I M I N A R Y

Am79C930

Pin 101: SDCLK

The SDCLK pin may be configured for input or output

operation. The output drive may be programmed for reg-

ister-driven or auto-pulse generation. The auto-pulse

may be programmed for either active low or active high

operation. SDCLK pin configuration is accomplished ac-

cording to the following table:

Note that a read of the SDC bit (TIR2[2]) will always

give the current SDCLK pin value, regardless of pin

configuration setting.

SDCLKEN

SDCP

SDC

SDCLK Pin

TCR13[4]

TIR2[3]

TIR2[2]

Direction

Value

LOW

reset default condition

HIGH active pulse

(when write to TIR2 occurs)

HIGH

LOW active pulse

(when write to TIR2 occurs)

Pin 102: SDDATA

The SDDATA pin may be configured for input or output

operation. SDDATA pin configuration is accomplished

according to the following table:

Note that a read of the SDD bit (TIR2[0]) will always

give the current SDDATA pin value, regardless of pin

configuration setting.

SDDT

SDD

SDDATA Pin

TIR2[1]

TIR2[0]

Direction

Value

LOW

reset default condition

HIGH

Pin 103:

SDSEL3

The

SDSEL[3] pin may be configured for input or output

operation according to the following table:

Note that a read of the SDS[3] bit (TIR2[6]) will always

give the current

SDSEL[3] pin value without inversion,

regardless of pin configuration setting.

SDSEL3EN

SDS[

SDSEL[3]

TCR13[3]

TIR2[6]

Pin Direction

Pin Value

HIGH

reset default condition

LOW

Pin 105:

SDSEL2

The

SDSEL[2] pin may be configured for input or output

operation according to the following table:

Note that a read of the SDS[2] bit (TIR2[5]) will always

give the current

SDSEL[2] pin value without inversion,

regardless of pin configuration setting.

SDSEL2EN

SDS[

SDSEL[2]

TCR13[2]

TIR2[5]

Pin Direction

Pin Value

HIGH

reset default condition

LOW

Pin 107:

SDSEL1

The

SDSEL[1] pin may be configured for input or output

operation according to the following table:

Note that a read of the SDS[1] bit (TIR2[4]) will always

give the current

SDSEL[1] pin value without inversion,

regardless of pin configuration setting.

SDSEL1EN

SDS[1]

SDSEL[1]

TCR13[1]

TIR2[4]

Pin Direction

Pin Value

HIGH

reset default condition

LOW

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