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IR2103SPBF Arkusz danych(PDF) 4 Page - Infineon Technologies AG

Numer części IR2103SPBF
Szczegółowy opis  Half-Bridge Driver
PDF  18 Pages
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Producent  INFINEON [Infineon Technologies AG]
Strona internetowa  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

IR2103SPBF Arkusz danych(HTML) 4 Page - Infineon Technologies AG

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IR2103(S)PBF
4
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© 2013 International Rectifier
April 18, 2013
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions.
Symbol
Definition
Min.
Max.
Units
VB
High side floating absolute voltage
-0.3
625
V
VS
High side floating supply offset voltage
VB - 25
VB + 0.3
VHO
High side floating output voltage
VS - 0.3
VB + 0.3
VCC
Low side and logic fixed supply voltage
-0.3
25
VLO
Low side output voltage
-0.3
VCC + 0.3
VIN
Logic input voltage (HIN & LIN
¯¯¯)
-0.3
VCC + 0.3
dVS/dt
Allowable offset supply voltage transient
50
V/ns
PD
Package power dissipation
@ TA ≤ +25°C
8 lead PDIP
1
W
8 lead SOIC
0.625
RthJA
Thermal resistance, junction to
ambient
8 lead PDIP
125
°C/W
8 lead SOIC
200
TJ
Junction temperature
150
°C
TS
Storage temperature
-55
150
TL
Lead temperature (soldering, 10 seconds)
300
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within
the recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.
Symbol
Definition
Min.
Max.
Units
VB
High side floating absolute voltage
VS + 10
VS + 20
V
VS
High side floating supply offset voltage
600
VHO
High side floating output voltage
VS
VB
VCC
Low side and logic fixed supply voltage
10
20
VLO
Low side output voltage
0
VCC
VIN
Logic input voltage (HIN & LIN)
0
VCC
TA
Ambient temperature
-40
125
°C
Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip DT97-3 for
more details).



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