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PA035XSL Arkusz danych(PDF) 5 Page - AZ Displays |
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PA035XSL Arkusz danych(HTML) 5 Page - AZ Displays |
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5 / 27 page ![]() PA035XSL The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page:5 5.Input / Output Terminals Pin No Symbol I/O Description Remark 1 STH1 I/O Start pulse for source driver Note 5-1 2 AVSS I Analog GND for source driver 3 AVDD I Analog power input for source driver Note 5-2 4 VB I Video Input B 5 VG I Video Input G 6 VR I Video Input R Note 5-4 7 VSS I Digital GND 8 VDD I Digital power input Note 5-3 9 CPH1 I Sampling and shift clock for source driver 10 CPH2 I Sampling and shift clock for source driver 11 CPH3 I Sampling and shift clock for source driver 12 STH2 I/O Start pulse for source driver Note 5-1 13 Q2H I Video input rotation control 14 INH I Output enable for source driver 15 R/L I Left/Right Control for source driver Note 5-1 16 VCOM I Common electrode voltage Note 5-4 17 XOE I Output enable for gate driver 18 CPV I Clock input for gate driver 19 U/D I Up/Down Control for gate driver 20 DIO2 I/O Vertical start pulse 21 DIO1 I/O Vertical start pulse Note 5-5 22 VGL I Gate off voltage(alternative every 1-H) Note 5-4 23 VEE I Gate driver negative voltage Note 5-6 24 VSS I GND 25 VCC I Logic power for gate driver Note 5-3 26 VGH I Gate on voltage Note 5-7 27 NC 28 GLED2 I Supply current for LED B/L 29 GLED3 I Supply current for LED B/L 30 VLED I Supply voltage for LED B/L Note 5-1:STH1, STH2 and R/L mode R/L STH1 STH2 Remark High(VDD) Input Output Left to Right Low(0 Volt.) Output Input Right to Left |
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