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PI3DPX1202A2 Arkusz danych(PDF) 14 Page - Diodes Incorporated |
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PI3DPX1202A2 Arkusz danych(HTML) 14 Page - Diodes Incorporated |
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14 / 51 page ![]() PI3DPX1202A A product Line of Diodes Incorporated 14 of 51 www.diodes.com September 2017 © Diodes Incorporated PI3DPX1202A Document number: DS40115 Rev.2-1 Reset Implementation When ENABLE is Low, the device is power-down mode and output are high impedance. It is critical to transi- tion the ENABLE after the power supply VDD has reached the minimum recommended operation voltage. This can be achieved by the control signal GPO or by an external capacitor connected to GND. To insure properly Reset, the ENABLE pin must be de-asserted for at least 100μS before asserted, and must be reprogrammed in I2C programming mode. When using external capacitor, the size of the cap value depends on the power up VDD supply ramp. Larger value results in a slower ramp-up time. Consider 0.1uF capacitor as a reasonable first estimate. 100k-Ohm VDD ENABLE 100k-Ohm VDD C C ENABLE GPO External Capacitor Controlled GPO pin contolled from Controller IC Figure 4-4: Reset control from External Capacitor or GPO pin |
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