June 2005

ASM2P20807A

rev 0.2

Alliance Semiconductor

2575, Augustine Drive

• Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com

Notice: The information in this document is subject to change without notice.

2.5V CMOS 1-TO-10 CLOCK DRIVER

Features

• High frequency > 150MHz

• Guaranteed low skew < 150pS (max.) between any two

outputs

• Very low duty cycle distortion < 300pS

• High speed: propagation delay < 3nS

• Very low CMOS power levels

• TTL compatible inputs and outputs

• 1:10 fanout

• Maximum output rise and fall time < 1.25nS (max.)

• Low input capacitance: 3pF (typ)

• 2.5V Supply Voltage

• Available in SSOP and QSOP Packages

Product Description

The ASM2P20807A is a 2.5V compatible, high speed, low

noise, 1:10 fanout, non-inverting clock buffer. The large

fanout from a single input reduces loading on the preceding

driver and provides an efficient clock distribution network.

Providing output to output skew as low as 150pS, the

ASM20807A is an ideal clock distribution device for

synchronous systems. Multiple power and grounds reduce

noise. Typical applications are clock and signal distribution.

Block Diagram

IN