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A6986H Arkusz danych(PDF) 40 Page - STMicroelectronics |
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A6986H Arkusz danych(HTML) 40 Page - STMicroelectronics |
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40 / 71 page ![]() 6.4 Total loop gain In summary, the open loop gain can be expressed as: G(s)=GDIV(s)⋅GCO(s)⋅A0(s) (32) example 1: VIN = 12 V, VOUT = 3.3 V, ROUT = 1.67 Ω Selecting the A6986H with VOUT=3.3 V, fSW = 500 kHz, L = 10 µH, COUT = 20 µF and ESR = 3 mΩ, RC = 75 kΩ, CC = 330 pF, CP = 2.2 pF (please refer to Table 19. A6986H 3V3 demonstration board BOM), the gain and phase bode diagrams are plotted respectively in Figure 38. Module plot and Figure 39. Phase plot. Figure 38. Module plot BW = 55 kHZ phase margin = 60 ° Figure 39. Phase plot The blue solid trace represents the transfer function including the sampling effect term (see Eq. (22)), the dotted blue trace neglects the contribution. A6986H Total loop gain DS12861 - Rev 3 page 40/71 |
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