CDC950

133MHz DIFFERENTIAL CLOCK SYNTHESIZER/DRIVER FOR

PC MOTHERBOARDS/SERVERS

SCAS646B − FEBRUARY 2001 − REVISED OCTOBER 2003

6

POST OFFICE BOX 655303

DISSIPATION RATING TABLE

PACKAGE

TA ≤ 25°C

POWER RATING

DERATING FACTOR†

ABOVE TA = 25°C

TA = 70°C

POWER RATING

TA = 85°C

POWER RATING

DGG

1400 mW

11.2 mW/

°C

900 mW

730 mW

† This is the inverse of the traditional junction-to-case thermal resistance (RθJA) and uses a

board-mounted device at 89

°C/W

recommended operating conditions (see Note 4)

MIN

NOM‡

MAX

UNIT

Supply voltages, VDD, AVDD

3.135

3.3

3.465

High-level input voltage, VIH

2

V

Low-level input voltage, VIL

0.8

V

Input voltage, VI

−0.3

VDD + 0.3

HCLK/HCLK

−40

High-level output current, IOH

CLK33

−18

High-level output current, IOH

3V48/SelA and 3V48/SelB

−14

REFCLK

−14

mA

HCLK/HCLK

0

mA

Low-level output current, IOL

CLK33

12

Low-level output current, IOL

3V48/SelA and 3V48/SelB

9

REFCLK

9

Test mode

14

MHz

Crystal, f(XTAL)¶

Normal mode

13.8

14.318

14.8

MHz

Operating free-air temperature, TA

0

85

°C

‡ All nominal values are measured at their respective nominal VDD values.

§ Reference frequency is a test clock driven on the XIN input during the device test mode or normal mode. In test mode, XIN can be driven externally

up to f(XIN) = 16 MHz. If XIN is driven externally, XOUT is floating.

NOTE 4: Unused inputs must be held high or low to prevent them from floating.