MITSUBISHI < STD. LINEAR ICs >

M62320P,FP

2/20,1998(rev) (

/ 9 )

MITSUBISHI ELECTRIC

8-BIT I/O EXPANDER for I C BUS

2

• Note that a transmitter must internally provide at least a hold time to bridge the undefined region

(max.300 ns) of the falling edge of SCL.

SCL clock frequency

Free time: the bus must be free before a new transmission can start

KHz

µs

ns

ns

ns

µs

µs

µs

µs

µs

µs

Parameter

Hold time START Condition. After this period,the first clock pulse

is generated.

LOW period of the clock

HIGh period of the clock

Set-up time for START condition (Only relevant for a repeated

START condition)

Data Hold time

Data Set-up time

Rise time of SDA and SCL signals

Fall time of SDA and SCL signals

Set-up time for STOP condition

Symbol

Unit

Min.

0

4.7

4.0

4.7

4.0

4.7

0

250

4.0

-

-

Max.

100

1000

300

-

-

-

-

-

-

-

-

Limits

TIMING CHART

SDA

SCL

START

START

STOP

START

4

I C BUS CHARACTERISTICS

2