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DSC2021

Page 3

MK-Q-B-P-D-12042604-2

DSC2021

Low-Jitter Configurable Dual LVPECL-CMOS Oscillator

Output Clock Frequencies

Table 2 lists the standard frequency configurations and the associated ordering information to be

used in conjunction with the ordering code above. Customer defined combinations are available.

Table 2. Pre-programmed pin-selectable output frequency combinations

Ordering

Info

Freq

(MHz)

Freq Select Bits [FS2, FS1, FS0] – Default is [111]

000

001

010

011

100

101

110

111

I0001

150

150

125

100

150

156.25

125

100

75

50

50

50

25

25

25

25

I000X

Contact factory for additional configurations.

Frequency select bit are weakly tied high so if left unconnected the default setting will be [111] and

the device will output the associated frequency highlighted in Bold.

Absolute Maximum Ratings

Item

Min

Max

Unit

Condition

Supply Voltage

-0.3

+4.0

V

Input Voltage

-0.3

V

Junction Temp

-

+150

°C

Storage Temp

-55

+150

°C

Soldering Temp

-

+260

°C

40sec max.

ESD

HBM

MM

CDM

-

4000

400

1500

V

Note: 1000+ years of data retention on internal memory

Ordering Code

DSC2021

xxxxx

Freq (MHz)

See Freq. table

-

Packing

T: Tape & Reel

: Tube

F I 2

Package

F: 3.2x2.5mm

Temp Range

E: -20 to 70

I: -40 to 85

Stability

1: ±50ppm

2: ±25ppm

5: ±10ppm

T