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EM78P152S Arkusz danych(PDF) 9 Page - List of Unclassifed Manufacturers |
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EM78P152S Arkusz danych(HTML) 9 Page - List of Unclassifed Manufacturers |
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9 / 52 page ![]() EM78P152/3S 8-Bit Microcontroller with OTP ROM 5 Functional Description Interrupt Controller ROM Instruction Register Instruction Decoder R2 ALU Stack ACC R3 R4 Oscillator/Timing Control WDT Timer Prescaler R1 (TCC) RAM DATA & CONTROL BUS OSCI OSCO /RESET TCC /INT I/O Port 6 IOC6 R6 Built-in OSC P60 P61 P62/TCC P63//REST P64/OSCO P65/OSCI P66 P67 I/O Port 5 IOC5 R6 P50 P51 P52 P53 Figure 5-1 EM78P153S Functional Block Diagram 5.1 Operational Registers 5.1.1 R0 (Indirect Addressing Register) R0 is not a physically implemented register. It is used as an indirect addressing pointer. Any instruction using R0 as a pointer actually accesses data pointed by the RAM Select Register (R4). 5.1.2 R1 (Timer Clock /Counter) Incremented by an external signal edge, which is defined by TE bit (CONT-4) through the TCC pin, or by the instruction cycle clock. Writable and readable as any other registers. Defined by resetting PAB (CONT-3). The prescaler is assigned to TCC, if the PAB bit (CONT-3) is reset. The contents of the prescaler counter will be cleared only when the TCC register is written with a value. Product Specification (V1.8) 09.08.2009 • 5 (This specification is subject to change without further notice) |
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