MCP48FVB01 datasheet(18/84 Pages) MICROCHIP

18 / 84 page

MCP48FVBXX

DS20005466A-page 18

 2015 Microchip Technology Inc.

1.1

Reset, Power-Down, and SPI Mode Timing Waveforms and Requirements

FIGURE 1-1:

Power-on and Brown-out Reset Waveforms.

FIGURE 1-2:

SPI Power-Down Command Waveforms.

TABLE 1-1:

RESET AND POWER-DOWN TIMING

Timing

Characteristics

Standard Operating Conditions (unless otherwise specified):

Operating Temperature: -40°C

 TA  +125°C (Extended)

Unless otherwise noted, all parameters apply across these specified operating ranges:

VDD = +1.8V to 5.5V, VSS = 0V

RL = 5 k from VOUT to VSS, CL = 100 pF

Typical specifications represent values for VDD = 5.5V, TA = +25°C.

Parameters

Sym. Min. Typ. Max. Units

Conditions

Power-on Reset Delay tPORD —60

—

µs

Brown-out Reset Delay tBORD —45

—

µs

VDD transitions from VDD(MIN)  > VPOR

VOUT driven to VOUT disabled

Power-Down Output

Disable Time Delay

TPDD

—

10.5

—

µs

PDxB:PDxA = ‘11’, ‘10’, or ‘01’

 “00” started from

falling edge of the SCK at the end of the 24th clock cycle.

Volatile DAC Register = FFh, VOUT =10 mV

VOUT not connected

Power-Down Output

Enable Time Delay

TPDE

—

µs

PDxB:PDxA = “00”

 ‘11’, ‘10’, or ‘01’ started from

falling edge of the SCK at the end of the 24th clock cycle

VOUT = VOUT - 10 mV. VOUT not connected

VDD

tPORD

tBORD

VOUT

VPOR (VBOR)

VOUT at High Z

SPI Interface is operational

24th bit

SCK

VOUT

tPDE

tPDD

(Write

command)

1st bit

(Next

command)

24th bit

(Write

command)

MCP48FVB01 Arkusz danych(PDF) 18 Page - Microchip Technology

MCP48FVB01 Arkusz danych(HTML) 18 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84

Arkusz danych Pobierz

Link URL