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MCP48FVB24 Arkusz danych(PDF) 5 Page - Microchip Technology |
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MCP48FVB24 Arkusz danych(HTML) 5 Page - Microchip Technology |
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5 / 112 page ![]() 2020 Microchip Technology Inc. DS20006362A-page 5 MCP48FXBX4/8 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings(†) Voltage on VDD with Respect to VSS ........................................................................................................ -0.6V to +6.5V Voltage on All Pins with Respect to VSS ............................................................................................ -0.6V to VDD+0.3V Input Clamp Current, IIK (VI < 0, VI > VDD, VI > VPP on HV Pins) ........................................................................±20 mA Output Clamp Current, IOK (VO < 0 or VO > VDD) .................................................................................................±20 mA Maximum Current out of the VSS Pin (Quad) .........................................................................................................150 mA (Octal)..........................................................................................................150 mA Maximum Current into the VDD Pin (Quad) .........................................................................................................150 mA (Octal)..........................................................................................................150 mA Maximum Current Sourced by the VOUT Pin...........................................................................................................20 mA Maximum Current Sunk by the VOUT Pin................................................................................................................20 mA Maximum Current Sunk by the VREF Pin ...............................................................................................................125 µA Maximum Input Current Source/Sunk by the SDI, SCK and CS Pins ......................................................................2 mA Maximum Output Current Sunk by the SDO Output Pin ........................................................................................25 mA Total Power Dissipation(1) ....................................................................................................................................400 mW Package Power Dissipation (TA = +50°C, TJ = +150°C) 20-Lead TSSOP......................................................................................................................................1300 mW 20-Lead VQFN (5 x 5 mm, ML)...............................................................................................................2800 mW ESD Protection on all Pins ±6 kV (HBM) ±400V (MM) ±2 kV (CDM) Latch-up (per JEDEC® JESD78A) at +125°C ....................................................................................................±100 mA Storage Temperature ..............................................................................................................................-65°C to +150°C Ambient Temperature with Power Applied .............................................................................................-55°C to +125°C Soldering Temperature of Leads (10 seconds) ..................................................................................................... +300°C Maximum Junction Temperature (TJ).................................................................................................................... +150°C Note 1: Power dissipation is calculated as follows: PDIS = VDD × {IDD – IOH} + {(VDD –VOH) × IOH} + (VOL × IOL) † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. |
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