TUSB211 datasheet(13/31 Pages) TI

13 / 31 page

Figure 8-2. CONFIGURATION Register

RESERVED

CFG_ACTIVE

RH/W-X

RH/W-0x1

Table 8-6. CONFIGURATION Register Field Descriptions

Bit

Field

Type

Reset

Description

7-1

RESERVED

RH/W

These bits are reserved bits and set by hardware at reset.

When this register is modified the software should first read these

reserved bits and rewrite with the same values

CFG_ACTIVE

RH/W

0x1

Configuration mode

After reset, if I2C mode is true (SCL and SDA are both pulled high)

set the bit to get into configuration mode and clear to return to

normal mode.

0x0 = NORMAL MODE

0x1 = CONFIGURATION MODE

8.5.3 DC_BOOST Register (Offset = 0xE) [reset = X]

DC_BOOST is shown in Figure 8-3 and described in Table 8-7.

Return to Summary Table.

This register is setting DC BOOST level.

Figure 8-3. DC_BOOST Register

RESERVED

DCB_LVL

RH/W-X

Table 8-7. DC_BOOST Register Field Descriptions

Bit

Field

Type

Reset

Description

7-4

RESERVED

RH/W

These bits are reserved bits and set by hardware at reset.

When this register is modified the software should first read these

reserved bits and rewrite with the same values

3-0

DCB_LVL

RH/W

XXXXb (sampled at startup from BOOST pin)

0000b to 1111b range

0x0 = BOOST PIN LEVEL 0 (lowest dc boost setting)

0x2 = BOOST PIN LEVEL 1 and 2

0x6 = BOOST PIN LEVEL 3

0xF = (highest dc boost setting)

8.5.4 RX_SEN Register (Offset = 0x25) [reset = X]

RX_SEN is shown in Figure 8-4 and described in Table 8-8.

Return to Summary Table.

This register is setting RX Sensitivity level.

www.ti.com

TUSB217A

SLLSFK5 – JUNE 2021

Submit Document Feedback

Product Folder Links: TUSB217A

TUSB211 Arkusz danych(PDF) 13 Page - Texas Instruments

TUSB211 Arkusz danych(HTML) 13 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

Arkusz danych Pobierz

Link URL