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MPC885ZP80 Arkusz danych(PDF) 35 Page - NXP Semiconductors

Numer części MPC885ZP80
Szczegółowy opis  MPC885/MPC880 PowerQUICC Hardware Specifications
PDF  87 Pages
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Producent  NXP [NXP Semiconductors]
Strona internetowa  http://www.nxp.com
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MPC885ZP80 Arkusz danych(HTML) 35 Page - NXP Semiconductors

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MPC885/MPC880 PowerQUICC Hardware Specifications, Rev. 7
Freescale Semiconductor
35
Bus Signal Timing
Figure 23 provides the timing for the synchronous external master access controlled by the GPCM.
Figure 23. Synchronous External Master Access Timing (GPCM Handled—ACS = 00)
Figure 24 provides the timing for the asynchronous external master memory access controlled by the
GPCM.
Figure 24. Asynchronous External Master Memory Access Timing (GPCM Controlled—ACS = 00)
Figure 25 provides the timing for the asynchronous external master control signals negation.
Figure 25. Asynchronous External Master—Control Signals Negation Timing
CLKOUT
TS
A[0:31],
TSIZ[0:1],
R/W, BURST
CSx
B41
B42
B40
B22
CLKOUT
AS
A[0:31],
TSIZ[0:1],
R/W
CSx
B39
B40
B22
AS
CSx, WE[0:3],
OE, GPLx,
BS[0:3]
B43



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