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PD70101 Arkusz danych(PDF) 14 Page - Microchip Technology |
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PD70101 Arkusz danych(HTML) 14 Page - Microchip Technology |
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14 / 24 page ![]() 3. Pin Description The following illustration shows the device pinout, from the top view and bottom view. Figure 3-1. Pinout Top View and Bottom View The following table lists the pin descriptions for the PD70100/PD70200 devices. Table 3-1. Pin Descriptions Pin Pin Name (PD70100) Pin Name (PD70200) Type Description 1 RDET RDET Valid Detection resistor. Connect external 24.9 KΩ detection resistor between RDET and VPP. 2 RREF RREF Bias current resistor. Connect a 243 k 1% resistor between this pin and VPNIN. 3 RCLASS RCLASS Power classification setting. Connect external class resistor between RCLASS and VPNIN. 4 VPNIN VPNIN Power VPort Negative input. Connected to the isolating SW input. N-channel MOSFET source. The exposed thermal pad should be connected to these pins. 5 6 N.C. N.C. 7 VPNOUT VPNOUT Power/Gnd Vport Negative output. Connected to the isolating SW output. N-channel MOSFET Drain. Primary side Ground. A decent ground plane should be deployed around this pin whenever is possible. 8 PD70100/PD70200 Pin Description © 2020 Microchip Technology Inc. Datasheet DS00003639A-page 14 |
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