Preliminary for proposal

PLL502-01

Low Phase Noise VCXO (24MHz to 50MHz)

47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991

Rev 4/01/02 Page 1

FEATURES

• Low phase noise VCXO output for the 24MHz to

50MHz range (-130 dBc at 10kHz offset).

• CMOS output.

• 12 to 25MHz crystal input.

• Integrated variable capacitors.

• Selectable High Drive (36mA drive capability at

TTL level) or Standard Drive (12mA drive capa-

bility at TTL) output.

• Wide pull range (+/- 250 ppm).

• Low jitter (RMS): 10ps period.

• 3.3V operation.

• Available in 8-Pin TSSOP or SOIC.

DESCRIPTIONS

The PLL502-01 is a low cost, high performance and

low phase noise VCXO, providing less than -130dBc

at 10kHz offset in the 24MHz to 50MHz operating

range. The very low jitter (10 ps RMS period jitter)

makes this chip ideal for applications requiring volt-

age controlled frequency sources. Input crystal can

range from 12 to 25MHz (fundamental resonant

mode).

PIN CONFIGURATION

OUTPUT RANGE

MULTIPLIER

FREQUENCY

RANGE

OUTPUT

BUFFER

x2

24 - 50MHz

CMOS

BLOCK DIAGRAM

Reference

Divider

Phase

Comparator

Charge

Pump

Loop

Filter

VCO

VCO

Divider

XTAL

OSC

OE

XIN

XOUT

CLK

VIN

VARICAP

1

2

3

4

5

6

7

8

XOUT

N/C

VIN

GND

XIN

VDD

CLK

OE