Preliminary

PLL501-22

27MHz Multiple Output VCXO with Audio Clock

47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991

Rev 03/02/04 Page 2

PIN DESCRIPTIONS

Name

Pin #

Type

Description

XIN

1

I

Crystal input to be connected to fundamental parallel mode crystal.

XOUT

2

I

Crystal output connector.

VDD

3

P

3.3V power supply.

VDD

4

P

3.3V power supply.

VIN

5

I

Frequency control input (0V to 3.3V).

GND

6

P

Ground.

GND

7

P

Ground.

PDOWN

8

I

Digital control input. This input powers down the entire chip and tri-states

all outputs when low. 60k

Ω internal pull-up.

S2

9

I

Digital control input to select audio frequency.

60k

Ω internal pull-up.

ACLK

10

O

Audio clock output (see selection table on page 1).

GND

11

P

Ground.

27MHz

12

O

27MHz VCXO output.

S0

13

I

Digital control input to select audio frequency.

60k

Ω internal pull-up.

VDD

14

P

3.3V power supply.

27MHz

15

O

27MHz VCXO output.

S1

16

I

Digital control input to select audio frequency.

60k

Ω internal pull-up.

Notes: I – input pin; P – power supply/ground pin; O – output pin.

ELECTRICAL SPECIFICATIONS

1. Absolute Maximum Ratings

PARAMETERS

SYMBOL

MIN.

MAX.

UNITS

Supply Voltage

7

V

Input Voltage, dc

V

Output Voltage, dc

V

Storage Temperature

-65

150

°C

Junction Temperature

125

°C

Lead Temperature (soldering, 10s)

260

°C

Input Static Discharge Voltage Protection

2

kV

Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permanent damage to the

device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other

conditions above the operational limits noted in this specification is not implied.