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ADCLK914BCPZ-R2 Arkusz danych(PDF) 7 Page - Analog Devices

Numer części ADCLK914BCPZ-R2
Szczegółowy opis  Ultrafast, SiGe, Open-Collector HVDS Clock/Data Buffer
PDF  11 Pages
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Producent  AD [Analog Devices]
Strona internetowa  http://www.analog.com
Logo AD - Analog Devices

ADCLK914BCPZ-R2 Arkusz danych(HTML) 7 Page - Analog Devices

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Data Sheet
ADCLK914
Rev. B | Page 7 of 11
TYPICAL PERFORMANCE CHARACTERISTICS
VCC = 3.3 V, VEE = 0 V, TA = 25°C. All outputs terminated through 50 Ω to VCC, unless otherwise noted.
Q
Q
62.5ps/DIV
Figure 3. Output Waveform at 1 GHz, VCC = 3.3 V
–120
–130
–140
–150
–160
–170
10
100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 4. Phase Noise at 122.88 MHz
–120
–130
–140
–150
–160
–170
10
100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 5. Phase Noise at 245.76 MHz
Q
Q
100ps/DIV
Figure 6. Output Waveform at 1 GHz, VCC = 3.3 V
–120
–130
–140
–150
–160
–170
10
100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 7. Phase Noise at 622.08 MHz
350
0
0
1
2
3
4
5
6
7
8
INPUT SLEW RATE (V/ns)
300
250
200
150
100
50
TA = 25°C
Figure 8. RMS Jitter vs. Input Slew Rate



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