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ICS558-01 Arkusz danych(PDF) 3 Page - Integrated Circuit Systems

Numer części ICS558-01
Szczegółowy opis  PECL/CMOS TO CMOS CLOCK DIVIDER
PDF  5 Pages
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Producent  ICST [Integrated Circuit Systems]
Strona internetowa  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS558-01 Arkusz danych(HTML) 3 Page - Integrated Circuit Systems

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PECL/CMOS TO CMOS CLOCK DIVIDER
MDS 558-01 C
3
Revision 122105
In te gr ated Circuit Systems 525 Ra ce Street, San Jose, CA 9512 6 tel (4 08) 297-1 201 www.icst.com
ICS558-01
External Components
The ICS558-01 requires two 0.01
µF capacitors between VDDP and GND, and VDDC and GND—one on
each side of the chip. These must be close to the chip to minimize lead inductance. Series termination
resistors of 33
Ω can be used on the outputs (these also must be close to the chip).
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS558-01. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
DC Electrical Characteristics
VDDP = VDDC = 3.3V (unless stated otherwise), Ambient temperature 0 to +70
°C
Item
Rating
Supply Voltage; VDDP, VDDC (referenced to ground)
7.0 V
Inputs and Clock Outputs (referenced to ground)
-0.5 V to VDD+0.5 V
Ambient Operating Temperature
0 to +70
°C
Storage Temperature
-65 to +150
°C
Soldering Temperature (maximum of 10 seconds)
260
°C
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Operating Voltage, VDDP
VDDP
VDDC
3.0
5.5
V
Operating Voltage, VDDC
VDDP
VDDC
2.375
VDDP
V
Input High Voltage, CMOSIN
VIH
(VDDP/2)+1
V
Input Low Voltage, CMOSIN
VIL
(VDDP/2)-1
V
Input High Voltage
VIH
non-clock pins
VDDP-0.5
VDDP
V
Input Low Voltage
VIL
non-clock pins
0.5
V
Common Mode Range,
PECLIN
VDDP=5 V
VDDP-3.7
VDDP-0.6
V
Common Mode Range,
PECLIN
VDDP=3.3 V
VDDP-2.0
VDDP-0.6
V
Peak-to-Peak Input Voltage,
PECLIN
0.3
1.0
V
Output High Voltage
VOH
VDDC = 5 V,
IOH = -24 mA
VDDC-0.4
V
Output Low Voltage
VOL
VDDC = 5 V,
IOL = 24 mA
0.4
V
Output High Voltage
VOH
VDDC = 3.3 V,
IOH = -18 mA
VDDC-0.4
V



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