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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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HCS08 Arkusz danych(PDF) 246 Page - NXP Semiconductors |
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HCS08 Arkusz danych(HTML) 246 Page - NXP Semiconductors |
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246 / 316 page  Timer/PWM Module (S08TPMV3) MC9S08SG8 MCU Series Data Sheet, Rev. 8 246 Freescale Semiconductor When the TPM is configured for center-aligned PWM (and ELSnB:ELSnA not = 0:0), the data direction for all channels in this TPM are overridden, the TPMxCHn pins are forced to be outputs controlled by the TPM, and the ELSnA bits control the polarity of each TPMxCHn output. If ELSnB:ELSnA=1:0, the corresponding TPMxCHn pin is cleared when the timer counter is counting up, and the channel value register matches the timer counter; the TPMxCHn pin is set when the timer counter is counting down, and the channel value register matches the timer counter. If ELSnA=1, the corresponding TPMxCHn pin is set when the timer counter is counting up and the channel value register matches the timer counter; the TPMxCHn pin is cleared when the timer counter is counting down and the channel value register matches the timer counter. Figure 16-5. High-True Pulse of a Center-Aligned PWM Figure 16-6. Low-True Pulse of a Center-Aligned PWM CHnF BIT TOF BIT ... 78 76 5 4 321 0 12 34 56 78 76 5 ... TPMxMODH:TPMxMODL = 0x0008 TPMxMODH:TPMxMODL = 0x0005 TPMxCNTH:TPMxCNTL TPMxCHn CHnF BIT TOF BIT ... 78 76 5 4 321 0 12 34 56 78 76 5... TPMxMODH:TPMxMODL = 0x0008 TPMxMODH:TPMxMODL = 0x0005 TPMxCNTH:TPMxCNTL TPMxCHn |
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