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ADP5041ACPZ-1-R7 Arkusz danych(PDF) 8 Page - Analog Devices

Numer części ADP5041ACPZ-1-R7
Szczegółowy opis  Micro PMU with 1.2 A Buck, Two 300 mA LDOs, Supervisory, Watchdog, and Manual Reset
PDF  40 Pages
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Strona internetowa  http://www.analog.com
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ADP5041ACPZ-1-R7 Arkusz danych(HTML) 8 Page - Analog Devices

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ADP5041
Data Sheet
Rev. B | Page 8 of 40
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
14
13
12
1
3
4
VOUT2
15 FB2
VIN2
FB1
11 VOUT1
FB3
VIN3
2
VOUT3
EN3
5
nRSTO
ADP5041
TOP VIEW
(Not to Scale)
NOTES
1. EXPOSED PAD MUST BE CONNECTED TO
SYSTEM GROUND PLANE.
Figure 2. Pin Configuration—View from Top of the Die
Table 8. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
FB3
LDO2 Feedback Input.
2
VOUT3
LDO2 Output Voltage.
3
VIN3
LDO2 Input Supply (1.7 V to 5.5 V).
4
EN3
Enable LDO2. EN3 = high: turn on LDO2; EN3 = low: turn off LDO2.
5
nRSTO
Open-Drain Reset Output, Active Low.
6
AVIN
Housekeeping and Supervisory Input Supply (2.3 V to 5.5 V).
7
VIN1
Buck Input Supply (2.3 V to 5.5 V).
8
SW
Buck Switching Node.
9
PGND
Dedicated Power Ground for Buck Regulator.
10
EN1
Enable Buck. EN1 = high: turn on buck; EN1 = low: turn off buck.
11
VOUT1
Buck Output Sensing Node.
12
FB1
Buck Feedback Input.
13
VIN2
LDO1 Input Supply (1.7 V to 5.5 V).
14
VOUT2
LDO1 Output Voltage.
15
FB2
LDO1 Feedback Input.
16
EN2
Enable LDO1. EN2 = high: turn on LDO1; EN2 = low: turn off LDO1.
17
MODE
Buck Mode. MODE = high; buck regulator operates in fixed PWM mode; MODE = low; buck regulator operates
in power saving mode (PSM) at light load and in constant PWM at higher load.
18
VTHR
Reset Threshold Programming.
19
WDI
Watchdog Refresh Input from Processor. If WDI is in high-Z, watchdog is disabled.
20
MR
Manual Reset Input, Active Low.
0
EPAD
Exposed Pad (Analog Ground). The exposed pad must be connected to the system ground plane.



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