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High Speed CMOS Logic – 74HC240

Octal 3-State Inverting Buffer / Line Driver / Line Receiver in bare die form

Rev 1.1

30/11/21

Features:



Output Drive Capability: 15 LSTTL Loads



Low Input Current: 1µA



Outputs directly interface CMOS, NMOS and TTL



Operating Voltage Range: 2V to 6V



CMOS High Noise Immunity



Function compatible with 74LS240



Lower power alternative to Bipolar or BiCMOS logic

Ordering Information

Description

Die Dimensions in µm (mils)

The 74HC240 is produced on a 2.5µm 5V CMOS process

combining high speed LSTTL performance with CMOS low

power. The device can be used as two 4-bit buffers or one

8-bit buffer & features inverting inputs with two output

enables, each controlling four of the 3-state outputs. The

device improves performance & density in clock drivers, 3-

state memory address drivers & bus orientated transmitters

and receivers. Device inputs are compatible with standard

CMOS outputs; with pull-up resistors, they are compatible

with LSTTL outputs. All inputs are equipped with protection

circuits against static discharge & transient excess voltage.

The following part suffixes apply:

1950 (77)



No suffix - MIL-STD-883 /2010B Visual Inspection

For High Reliability versions of this product please see

54HC240

Supply Formats:

Mechanical Specification



Default – Die in Waffle Pack (100 per tray capacity)



Sawn Wafer on Tape – On request



Unsawn Wafer – On request

Die Size (Unsawn)

1950 x 2050

77 x 81

µm

mils

Minimum Bond Pad Size

130 x 130

4.17 x 4.17

µm

mils

Die Thickness

350 (±20)

13.78 (±0.79)

µm

mils

Top Metal Composition

Al 1%Si 1.1µm

Back Metal Composition

N/A – Bare Si



Die Thickness <> 350µm(14 Mils) – On request



Assembled into Ceramic Package – On request

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