MAXM17543_V01 datasheet(18/20 Pages) MAXIM

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fSW = Switching frequency in Hz

L = Power module output inductance (6.8µH ±20%)

IOUT = Required output (load) current

The following condition should be satisfied at the desired

load current (IOUT).

OUT

3.2

∆

Thermal Fault Protection

The MAXM17543 features a thermal-fault protection

circuit. When the junction temperature rises above +165°C

(typ), a thermal sensor activates the fault latch, pulls down

the RESET output, and shuts down the regulator. The

thermal sensor restarts the controllers after the junction

temperature cools by 10°C (typ). The soft-start resets

during thermal shutdown.

Power Dissipation and Output-Current Derating

The MAXM17543 output current needs to be derated

if the device needs to be operated in a high ambient-

temperature environment. The amount of current-derating

depends upon the input voltage, output voltage, and

ambient temperature. The derating curves in TOC43

from the Typical Operating Characteristics section can be

used as guidelines. The curves are based on simulating

thermal resistance model (yJT), measuring thermal

resistance (yTA), and measuring power dissipation

(PDMAX) on the bench.

The maximum allowable power losses can be calculated

using the following equation:

JMAX

DMAX

−

where:

PDMAX is the maximum allowed power losses with maxi-

mum allowed junction temperature.

TJMAX is the maximum allowed junction temperature.

TA is operating ambient temperature.

θJA is the junction to ambient thermal resistance.

PCB Layout Guidelines

Careful PCB layout is critical to achieving low switching

losses and clean, stable operation.

Use the following guidelines for good PCB layout:

● Keep the input capacitors as close as possible to the

IN and PGND pins.

● Keep the output capacitors as close as possible to

the OUT and PGND pins.

● Keep the resistive feedback dividers as close as

possible to the FB pin.

● Connect all of the PGND connections to as large as

copper plane area as possible on the top layer.

● Connect EP1 to PGND and GND planes on bottom

layer.

● Use multiple vias to connect internal PGND planes

to the top layer PGND plane.

● Do not keep any solder mask on EP1, EP2, and EP3

on bottom layer. Keeping solder mask on exposed

pads decreases the heat dissipating capability.

● Keep the power traces and load connections short.

This practice is essential for high efficiency.

Using thick copper PCBs (2oz vs. 1oz) can enhance

full-load efficiency. Correctly routing PCB traces is

a difficult task that must be approached in terms of

fractions of centimeters, where a single milliohm of

excess trace resistance causes a measurable

efficiency penalty.

www.maximintegrated.com

Maxim Integrated │ 18

MAXM17543

4.5V to 42V, 2.5A High-Efficiency, DC-DC Step-Down

Power Module with Integrated Inductor

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