ADP7142ACPZN2.5-R7 datasheet(19/23 Pages) AD

19 / 23 page

Data Sheet

ADP7142

Rev. H | Page 19 of 23

105

115

125

135

145

0.1

0.2

0.3

0.4

0.5

0.6

0.8

1.0

0.7

0.9

TOTAL POWER DISSIPATION (W)

500mm2

100mm2

50mm2

TJ MAX

Figure 58. TSOT, TA = 25°C

140

130

120

110

100

0.1

0.2

0.3

0.4

0.5

0.6

0.7

TOTAL POWER DISSIPATION (W)

500mm2

100mm2

50mm2

TJ MAX

Figure 59. TSOT, TA = 50°C

145

105

115

125

135

00.40

0.35

0.30

0.25

0.20

0.15

0.10

0.05

TOTAL POWER DISSIPATION (W)

500mm2

100mm2

50mm2

TJ MAX

Figure 60. TSOT, TA = 85°C

In the case where the board temperature is known, use the

thermal characterization parameter, ΨJB, to estimate the

junction temperature rise (see Figure 61, Figure 62, and

Figure 63). Calculate the maximum junction temperature by

using Equation 2.

TJ = TB + (PD × ΨJB)

The typical value of ΨJB is 24°C/W for the 8-lead LFCSP package,

38.8°C/W for the 8-lead SOIC package, and 43°C/W for the 5-lead

TSOT package.

TOTAL POWER DISSIPATION (W)

100

120

140

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

TB = 25°C

TB = 50°C

TB = 65°C

TB = 85°C

TJ MAX

Figure 61. LFCSP Junction Temperature Rise, Different Board Temperatures

TOTAL POWER DISSIPATION (W)

100

120

140

0.5

1.0

1.5

2.0

2.5

3.0

TB = 25°C

TB = 50°C

TB = 65°C

TB = 85°C

TJ MAX

Figure 62. SOIC Junction Temperature Rise, Different Board Temperatures

TOTAL POWER DISSIPATION (W)

100

120

140

0.5

1.0

1.5

2.0

2.5

TB = 25°C

TB = 50°C

TB = 65°C

TB = 85°C

TJ MAX

Figure 63. TSOT Junction Temperature Rise, Different Board Temperatures

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