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L99UDL01 Arkusz danych(PDF) 17 Page - STMicroelectronics |
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L99UDL01 Arkusz danych(HTML) 17 Page - STMicroelectronics |
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17 / 24 page ![]() DB3264 Rev 3 17/24 L99UDL01 Device description 22 Standby is entered from sleep mode when VDD rises above VDDSLEEP as long as V3V3 > V3V3RST. Other than Emergency override mode Standby is the only mode that Normal operation can be entered. 2.5.3 Normal mode The L99UDL01 exits Standby mode and enters Normal mode when the CSN pin is pulled down meanwhile VDD is higher than VDDSLEEP and V3V3 is higher V3V3RST. This delay has to do with the charge pump and 3V3 regulator stabilization. When these voltages have reached their proper levels, the SDO pin is pulled low from a tri-stated condition. At that point, logic is operating, all circuits are activated and the SPI controller can be used to update the register configuration. When coming out from Standby, the configuration registers are set to their default values. In this startup phase, the Charge Pump circuit starts to work. When the charge pump rises above the CPLOW threshold actuation can be initiated via EN_OUT pin or via an appropriate SPI frame. The CPLOW bit is not cleared until the register is read and cleared. 2.5.4 Emergency override mode Emergency override mode is a crash override mechanism that will interrupt any current actuation command in progress and drives outputs according to the programmed values in the command and configuration registers. This mode also overrides all protections. In an Emergency override mode the device will not latch off if an overcurrent threshold is exceeded. Instead of latching off the driver and reporting a fault the output will continue to retry as in normal current regulation mode. All faults will be reported while not acted upon. Emergency override mode is initiated when a (1, 0) is entered in the EMCY bits (register 01H). All other bit configurations result in normal operation. When emergency override is enabled all current actuation activity will stop. To initiate a new actuation routine the OUT_ON bit must be set or the EN_OUT pin must be toggled. 2.6 Diagnostics and protections 2.6.1 Shorted load detection All integrated drivers are protected for shorts to ground or supply by a simple over current detection and latch off strategy. At turn on there is a blanking time (tOC_BLANKING) where the output is given time to turn on. After the blanking time if the output current exceeds (IOC) for longer than the filter time the faulted output(s) will be latched off. If a shorted condition occurs after an output is active only the filtering time applies to the latch-off action. The fault will be reported in the fault register (register 10H). The Global fault Functional Error 1 bit (FE1) will also be set. IOC applies to a single output. Multiple outputs in parallel will multiply the IOC value accordingly. Two outputs in parallel will garner a 2x increase in the IOC value. The same concept applies to have three outputs in parallel. |
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