Zakładka z wyszukiwarką danych komponentów
  Polish  ▼
ALLDATASHEET.PL

X  

Preview PDF HTML

STM32F373VC Arkusz danych(PDF) 89 Page - STMicroelectronics

Numer części STM32F373VC
Szczegółowy opis  ARM® Cortex®-M4 32b MCUFPU, up to 256KB Flash32KB SRAM, timers, 4 ADCs (16-bit Sig. Delta / 12-bit SAR), 3 DACs, 2 comp., 2.0-3.6 V
PDF  137 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32F373VC Arkusz danych(HTML) 89 Page - STMicroelectronics

Back Button STM32F373VC Datasheet HTML 85Page - STMicroelectronics STM32F373VC Datasheet HTML 86Page - STMicroelectronics STM32F373VC Datasheet HTML 87Page - STMicroelectronics STM32F373VC Datasheet HTML 88Page - STMicroelectronics STM32F373VC Datasheet HTML 89Page - STMicroelectronics STM32F373VC Datasheet HTML 90Page - STMicroelectronics STM32F373VC Datasheet HTML 91Page - STMicroelectronics STM32F373VC Datasheet HTML 92Page - STMicroelectronics STM32F373VC Datasheet HTML 93Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 89 / 137 page
background image
DocID022691 Rev 7
89/137
STM32F373xx
Electrical characteristics
114
Figure 19. I/O AC characteristics definition
6.3.15
NRST characteristics
NRST pin characteristics
The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up
resistor, RPU (see Table 52).
Unless otherwise specified, the parameters given in Table 55 are derived from tests
performed under ambient temperature and VDD supply voltage conditions summarized in
Table 22.
Table 55. NRST pin characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL(NRST)(1) NRST Input low level voltage
-
-
-
0.3VDD + 0.07(1)
V
VIH(NRST)(1) NRST Input high level voltage
-
0.445VDD + 0.398(1)
--
Vhys(NRST)(1)
NRST Schmitt trigger voltage
hysteresis
--
200
-
mV
RPU
Weak pull-up equivalent resistor(2)
VIN = VSS
25
40
55
k
Ω
VF(NRST)(1) NRST Input filtered pulse
-
-
-
100
ns
VNF(NRST)(1) NRST Input not filtered pulse
-
500
-
-
ns
1. Guaranteed by design.
2. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series
resistance is minimal (~10% order).



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Arkusz danych Pobierz

Go To PDF Page


Link URL



Czy Alldatasheet okazała się pomocna?  [ DONATE ] 

O Alldatasheet   |   Reklama   |   Kontakt   |   Polityka prywatności   |   Link do karty katalogowej    |   Linki   |   Lista producentów
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com