MDT2020(DF)

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P. 5

2005/6

VER 1.3

Power Edge Detect

Security bit

PED

Disable

Security weak Disable

PED

Enable

Security Disable

Security Enable

7. Reset Condition for all Registers

Register

Address

Power-On Reset

/MCLR or WDT Reset

CPIO A

－－

1111 1111

1111 1111

CPIO B

－－

1111 1111

1111 1111

CPIO C

－－

1111 1111

1111 1111

TMR

－－

--11 1111

--11 1111

IAR

00h

－

－

RTCC

01h

xxxx xxxx

uuuu uuuu

PC

02h

1111 1111

1111 1111

STATUS

03h

0001 1xxx

000# #uuu

MSR

04h

100x xxxx

100u uuuu

PORT A

05h

- - - - xxxx

- - - - uuuu

PORT B

06h

xxxx xxxx

uuuu uuuu

PORT C

07h

xxxx xxxx

uuuu uuuu

Note : u = unchanged, x = unknown, - = unimplemented, read as “0”

# = value depends on the condition of the following table

Condition

Status: bit 4

Status: bit 3

/MCLR reset (not during SLEEP)

u

u

/MCLR reset during SLEEP

1

0

WDT reset (not during SLEEP)

0

1

WDT reset during SLEEP

0

0