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STR730FZ1H7 Arkusz danych(PDF) 38 Page - STMicroelectronics |
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STR730FZ1H7 Arkusz danych(HTML) 38 Page - STMicroelectronics |
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38 / 40 page ![]() Known limitations STR73xF 38/40 6 Known limitations 6.1 Low Power Wait For Interrupt mode When the STR73x device is put in Low Power Wait For Interrupt mode (LPWFI), the Flash goes into Low Power mode or Power Down mode, depending on the setting of the PWD bit in the Flash Control Register 0 (default is ‘0’, Low Power mode). This default mode can create excessive voltage conditions on the transistor gates and may affect the long term behavior of the Low Power mode circuitry. Workaround There is no workaround. If Low Power Wait For Interrupt mode is used, it is strongly suggested to configure the Flash to enter Power Down mode (bit PWD = ‘1’). |
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