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MPC5644BCAMMJ1 Arkusz danych(PDF) 84 Page - NXP Semiconductors |
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MPC5644BCAMMJ1 Arkusz danych(HTML) 84 Page - NXP Semiconductors |
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84 / 116 page ![]() MPC5646C Microcontroller DataSheet, Rev. 7 Electrical Characteristics NXP Semiconductors 84 Figure 24. MII serial management channel timing diagram Table 47. MII serial management channel timing1 1 Output pads configured with SRE = 0b11. Spec Characteristic Min Max Unit M10 MDC falling edge to MDIO output invalid (minimum propagation delay) 0— ns M11 MDC falling edge to MDIO output valid (max prop delay) —25 ns M12 MDIO (input) to MDC rising edge setup 28 — ns M13 MDIO (input) to MDC rising edge hold 0— ns M14 MDC pulse width high 40% 60% MDC period M15 MDC pulse width low 40% 60% MDC period M11 MDC (output) MDIO (output) M12 M13 MDIO (input) M10 M14 M15 |
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