MP240 datasheet(4/5 Pages) APEX

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APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739

OPERATING

CONSIDERATIONS

MP240

GENERAL

Please read Application Note 1 “General Operating Consid-

erations” which covers stability, power supplies, heat sinking,

mounting, current limit, SOA interpretation, and speciﬁcation

interpretation. Visit www.apexmicrotech.com for design tools

that help automate tasks such as calculations for stability,

internal power dissipation, current limit, heat sink selection,

Apex’s complete Application Notes library, Technical Seminar

Workbook and Evaluation Kits.

GROUND PINS

The MP240 has two ground pins (pins 2, 40). These pins

provide a return for the internal capacitive bypassing of the

small signal stages of the MP240. The two ground pins are not

connected together on the substrate. Both of these pins are

required to be connected to the system signal ground.

BALANCING RESISTOR SELECTION (RS1-RS4)

The MP240 uses parallel sets of output transistors. To ensure

that the load current is evenly shared among the transistors

external balancing resistors RS1-RS4 are required. To calculate

the required value for each of the resistors use: R = 4.5/I2

,where I is the maximum expected output current. For example,

with a maximum output current of 10A each balancing resistor

should be 0.045 ohms. Each resistor dissipates 1.125W at the

maximum current. Use a non-inductive 2W rated resistor. A

ready source for such resistors is the IRC resistor series LR

available from Mouser Electronics.

SAFE OPERATING AREA

The MOSFET output stage of the MP240 is not limited by

second breakdown considerations as in bipolar output stages.

Only thermal considerations and current handling capabilities

limit the SOA (see Safe Operating Area graph on previous

page). The output stage is protected against transient ﬂyback

by the parasitic diodes of the output stage MOSFET structure.

However, for protection against sustained high energy ﬂyback

external fast-recovery diodes must be used.

COMPENSATION

The external compensation capacitor CC is connected to

pins 4 and 6. Unity gain stability can be achieved with CC =

680pF for a minimum phase margin of 60 degrees. At higher

gains more phase shift can usually be tolerated and CC can be

reduced resulting in higher bandwidth and slew rate. Use the

typical operating curves as a guide to select CC. A 200V NPO

(COG) type capacitor is required. Boost operation requires more

compensation or higher gains than with normal operation due

to the increased capacitance of the output transistors when

the output signal swings close to the supply rails.

OVERVOLTAGE PROTECTION

Although the MP240 can withstand differential input voltages

up to ±25V, in some applications additional external protection

may be needed. 1N4148 signal diodes connected anti-parallel

across the input pins is usually sufﬁcient. In more demanding

applications where bias current is important diode connected

JFETs such as 2N4416 will be required. See Q1 and Q2 in

Figure 1. In either case the differential input voltage will be

clamped to ±0.7V. This is sufﬁcient overdrive to produce the

maximum power bandwidth. Some applications will also need

over-voltage protection devices connected to the power supply

rails. Unidirectional zener diode transient suppressors are

recommended. The zeners clamp transients to voltages within

the power supply rating and also clamp power supply reversals

to ground. Whether the zeners are used or not the system

power supply should be evaluated for transient performance

including power-on overshoot and power-off polarity reversals

as well as line regulation. See Z1 and Z2 in Figure 1.

POWER SUPPLY BYPASSING

Bypass capacitors to power supply terminals +VS and -VS

must be connected physically close to the pins to prevent local

parasitic oscillation in the output stage of the MP240. Use

electrolytic capacitors at least 10µF per output amp required.

Bypass the electrolytic capacitors with high quality ceramic

capacitors 0.1µF or greater. In most applications power

supply terminals +VB and -VB will be connected to +VS and -VS

respectively. Although +VB and -VB are bypassed internally it

is recommended to bypass +VB and -VB with 0.1µF externally.

Additionally ground pins 2 and 40 must be connected to the

system signal ground.

CURRENT LIMIT

The two current limit sense lines are to be connected directly

across the current limit sense resistor. For the current limit to

work correctly pin 36 must be connected to the ampliﬁer output

side and pin 35 connected to the load side of the current limit

resistor RLIM as shown in Figure 2. This connection will bypass

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