STM32F405 datasheet(34/204 Pages) STMICROELECTRONICS

34 / 204 page

Description

STM32F405xx, STM32F407xx

34/203

DS8626 Rev 9

SysTick timer

This timer is dedicated to real-time operating systems, but could also be used as a standard

downcounter. It features:

•

A 24-bit downcounter

•

Autoreload capability

•

Maskable system interrupt generation when the counter reaches 0

•

Programmable clock source.

2.2.22

Inter-integrated circuit interface (I²C)

Up to three I²C bus interfaces can operate in multimaster and slave modes. They can

support the Standard-mode (up to 100 kHz) and Fast-mode (up to 400 kHz). They support

the 7/10-bit addressing mode and the 7-bit dual addressing mode (as slave). A hardware

CRC generation/verification is embedded.

They can be served by DMA and they support SMBus 2.0/PMBus.

2.2.23

Universal synchronous/asynchronous receiver transmitters (USART)

The STM32F405xx and STM32F407xx embed four universal synchronous/asynchronous

receiver transmitters (USART1, USART2, USART3 and USART6) and two universal

asynchronous receiver transmitters (UART4 and UART5).

These six interfaces provide asynchronous communication, IrDA SIR ENDEC support,

multiprocessor communication mode, single-wire half-duplex communication mode and

have LIN Master/Slave capability. The USART1 and USART6 interfaces are able to

communicate at speeds of up to 10.5 Mbit/s. The other available interfaces communicate at

up to 5.25 Mbit/s.

USART1, USART2, USART3 and USART6 also provide hardware management of the CTS

and RTS signals, Smart Card mode (ISO 7816 compliant) and SPI-like communication

capability. All interfaces can be served by the DMA controller.

STM32F405 Arkusz danych(PDF) 34 Page - STMicroelectronics