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Zakładka z wyszukiwarką danych komponentów |
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Zakładka z wyszukiwarką danych komponentów |
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STM32L4 Arkusz danych(PDF) 11 Page - STMicroelectronics |
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STM32L4 Arkusz danych(HTML) 11 Page - STMicroelectronics |
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11 / 33 page  System Clock Selection • Switching from Low to High speed or from High to Low speed system clock, it is recommended to use a transition state with a medium speed clock for at least 1us. • Clock source switching conditions: • Switching from HSE or HSI or MSI to PLL with AHB frequency ( HCLK) higher than 80MHz. • Switching from PLL with HCLK higher than 80MHz to HSE or HSI or MSI • Transition state: • Set the AHB prescaler HPRE[3:0] bits to divide System frequency by 2 • Switch system clock to PLL • Reconfigure AHB prescaler bits to needed HCLK frequency 10 In STM32L4+ Series devices, it is recommended to use a transition state while switching from Low to High speed or from High to Low speed system clock. This slide presents the recommended sequence for the transition state. 10 |
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