Input logic

L6399

10/18

DocID030402 Rev 2

6

Input logic

Input logic is provided with interlocking circuitry which prevents the two outputs (LVG, HVG)

being active at the same time when both the logic input pins (LIN, HIN) are at a high logic

level. In addition, to prevent cross-conduction of the external MOSFETs, after each output is

turned off, the other output cannot be turned on before a certain amount of time (DT) (see

Figure 4: Deadtime and interlocking timing definition and Figure 5: Deadtime and

interlocking waveform definitions).

Table 7. Truth table

Input

Output

LIN

HIN

LVG

HVG

LLLL

LH

L

H

HL

HL

HH

L(1)

1. Interlocking function.

L(1)