L9960 datasheet(10/95 Pages) STMICROELECTRONICS

10 / 95 page

Block diagram and pin description

L9960, L9960T

10/95

DS11115 Rev 10

Table 2. Pin definition (PSSO36twin die) and function

Pin # Pin name

Function

I/O

Type

PGND1

Power Ground

GND

SCLK1

SPI Serial Clock Input (internal pull-up)

SDI1

SPI Data In Input (internal pull-up)

SDO1

SPI Serial Data Out. Tri-state output buffer, Transfers data to the µC

OUT1A

Output of DMOS half bridge 1 [device A]

NDIS1

Bidirectional Enable pin: open drain output pulled low in case of VDD

over/under voltage. If the input is pulled low OUT 1-2 go to tri-state.

I/O

AGND1

Analog Ground pin

GND

VDD5

Regulated 5V supply

Not connected pin

11(1)

IN1B

Input Half Bridge 1 (internal pull-down) [device B]. Acting as PWM at

power-up, can be configured to IN1 via SPI frame

12(1)

IN2B

Input Half Bridge 2 (internal pull-down) [device B]. Acting as DIR at

power-up, can be configured as IN2 via SPI frame.

13(1)

VS2

Power supply voltage for Power Stages (external reverse protection

required)

14(1)

15(1)

CP2

Tank capacitor for Charge Pump output

16(1)

DIS2

Disable pin: if it is pulled high Out1-2 are in tri-state (internal pull-up)

17(1)

NCS2

SPI Chip Select Input (internal pull-up)

18(1)

OUT2B

Output of DMOS half bridge 2 [device B]

19(1)

PGND2

Power Ground

GND

20(1)

SCLK2

SPI Serial Clock Input (internal pull-up)

21(1)

SDI2

SPI Data In Input (internal pull-up).

22(1)

SDO2

SPI Serial Data Out

23(1)

OUT1B

Output of DMOS half bridge 1 [device B]. multi-bonding

24(1)

25(1)

NDIS2

Bidirectional Enable pin: open drain output pulled low in case of VDD

over/under voltage. If the input is pulled low OUT 1-2 go to tri-state.

I/O

26(1)

AGND2

Analog Ground pin

GND

VDDIO

Regulated 3.3/5V supply for SDO output buffer

Not connected pin

IN1A

Input Half Bridge 1 (internal pull-down) [device A]. Acting as PWM at

power-up, can be configured to IN1 via SPI

IN2A

Input Half Bridge 2 (internal pull-down) [device A]. Acting as DIR at

power-up, can be configured as IN2 via SPI.

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