STA8089FGA datasheet(22/33 Pages) STMICROELECTRONICS

22 / 33 page

Electrical characteristics

STA8089FGA

22/33

DocID029680 Rev 2

4.7

DC characteristics

Table 13 specifies the LDO1 voltage regulator characteristics.

Table 14 specifies the LDO2 voltage regulator characteristics.

Table 15 specifies the low voltage detection thresholds.

Table 16 lists the DC characteristics for all the IO digital buffers except for the following input

buffers: STBYn (24), STDBY_OUT (23), WAKEUP (26) and RSTn (25).

Table 13. LDO1 DC characteristics

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

VOL1

Output voltage (1.2V)

1.71 V ≤ VINL1 ≤ 1.89 V;

IOL1 ≤ 70 mA

1.1

1.20

1.32

IOL1

Output current

—

Table 14. LDO2 DC characteristics

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

VOL2

Output voltage

1.6 V ≤ VINL2 ≤ 4.3 V;

IOL2 ≤ 30 mA

1.08

1.20

1.32

IOL2

Output current

—

Table 15. Low voltage detection thresholds

Parameter

Min.

Typ.

Max.

Unit

Input LVD always on

VR(1)

1. Not tested in production.

Upper voltage threshold

—

1.680

—

Lower voltage threshold

—

1.650

—

Output LVD always

on VR(1)

Upper voltage threshold

—

0.995

—

Lower voltage threshold

—

0.935

—

Output LVD main

VR(1)

Upper voltage threshold @ VOL1 = 1.2 V

—

1.142

—

Lower voltage threshold @ VOL1 = 1.2 V

—

1.076

—

Table 16. I/O buffers DC characteristics

Symbol

Parameter

Test

conditions

Min.

Typ.

Max.

Unit

VIL(1)

Logical input low level voltage

VDDIO = 1.8 V

-0.3

—

0.3 * VDDIO

VDDIO = 3.3V

-0.3

—

0.8

VIH(1)

Logical input high level

voltage

VDDIO = 1.8 V

0.7 * VDDIO

—VDDIO + 0.3

VDDIO = 3.3V

2.0

—

VDDIO + 0.3

VHYST(2) Schmitt-trigger hysteresis

–

—

STA8089FGA Arkusz danych(PDF) 22 Page - STMicroelectronics

STA8089FGA Arkusz danych(HTML) 22 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33

Arkusz danych Pobierz

Link URL