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FDA803D Arkusz danych(PDF) 61 Page - STMicroelectronics |
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FDA803D Arkusz danych(HTML) 61 Page - STMicroelectronics |
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61 / 78 page ![]() DocID031487 Rev 2 61/78 FDA803D I2C bus interface 77 14.8 I2S, I2C and Enable relationship FDA803D provides both I2C and I2S communication by means of two different digital interfaces but connected to each other interfaces and clock domains. To program the I2C interface the I2S clock must be present, and at least 10 ms should have passed from the Enable pins setting event. In FDA803D the digital part has different clock domains: The I2C programming block clock is the I2C clock The I2S receiver clock which is the I2S clock The system clock which is generated by an internal PLL. The I2C commands are not effective if I2S clock is not present. However they will remain memorized inside I2C registers. If I2S clock is lost the digital machine goes in standby. I2S clock (SCK) should be given to device before enabling it (Enable pins set to ‘out of standby’). |
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