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PM8805 Arkusz danych(PDF) 39 Page - STMicroelectronics

Numer części PM8805
Szczegółowy opis  IEEE 802.3bt PoE-PD interface with embedded dual active bridge
PDF  48 Pages
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PM8805 Arkusz danych(HTML) 39 Page - STMicroelectronics

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DS12813 Rev 2
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PM8805
Thermal aspects
48
load of about 150 mW, considering that the size of those exposed pads is smaller than the
central one.
However, the hot swap pad is internally electrically and physically connected to the central
pad, so the most critical pads are the 4 pads at device corner. Figure 12 shows two possible
2-pair configurations depending on the polarity of the PSE.
Figure 12. 4-pair power dissipation configurations
The max. total power dissipated on each of the 4-pair configurations is:
Equation 5
In this case the central exposed pad and the hot swap MOSFET dissipate much more power
than the 2-pair cases: 1.01 W, while two corner pads dissipate 0.15 W each as in the 2P
cases.
In the assumption to require Tj=125°C max. at Ta=85°C, the package soldered on a PCB is
needed to show a global Rja of:
Equation 6
This value is comparable with the Rja of a standard VFQFPN 8x8mm with a single exposed
pad.
See Section 6 for a detailed description on the minimum layout that must be implemented
on the PCB in order to reach such value of global thermal resistance.
Ptot_4P = 4 x ((1A)
2 x 0.15Ohm) + ((2A)2 x 0.15Ohm) + (54V x 2mA)
= 0.6W + 0.6W + 0.11W = 1.31W
Rja = 40
C/1.3W = 30.5C/W



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