Data Sheet

ADRF5141

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

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Rev. 0 | 6 of 13

Figure 3. Pin Configuration (Top View)

Table 5. Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 2, 4 to 8, 10, 11, 15, 16, 18 to 20

GND

Ground. The GND pins must be connected to the RF and DC ground of the

PCB.

3

ANT

Antenna Port. Th ANT pin is DC-coupled to 0 V and AC matched to 50 Ω. No

DC blocking capacitor is necessary when the RF line potential is equal to 0 V

DC. See Figure 4 for the interface schematic.

9

RX

Receive Port. Th RX pin is DC-coupled to 0 V and AC matched to 50 Ω. No

DC blocking capacitor is necessary when the RF line potential is equal to 0 V

DC. See Figure 4 for the interface schematic.

12

CTRL

Control Input. See Figure 5 for the interface schematic.

13

VDD

Positive Supply Voltage Pin. See Figure 6 for the interface schematic.

14

VSS

Negative Supply Voltage Pin. See Figure 7 for the interface schematic.

17

TX

Transmit Port. The TX pin is DC-coupled to 0 V and AC matched to 50 Ω. No

DC blocking capacitor is necessary when the RF line potential is equal to 0 V

DC. See Figure 4 for the interface schematic.

EPAD

Exposed Pad. The exposed pad must be connected to the RF and DC

ground of the PCB.

INTERFACE SCHEMATICS

Figure 4. ANT, TX, and RX Pins Interface Schematic

Figure 5. CTRL Interface Schematic

Figure 6. VDD Pin Interface Schematic

Figure 7. VSS Pin Interface Schematic