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STLC3055N Arkusz danych(PDF) 9 Page - STMicroelectronics

Numer części STLC3055N
Szczegółowy opis  WLL & ISDN-TA SUBSCRIBER LINE INTERFACE CIRCUIT
PDF  25 Pages
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Producent  STMICROELECTRONICS [STMicroelectronics]
Strona internetowa  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STLC3055N Arkusz danych(HTML) 9 Page - STMicroelectronics

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STLC3055N
3.2.4 Ringing
When this mode is selected STLC3055N self generate an higher negative battery (-70V typ.) in order to
allow a balanced ringing signal of typically 65Vpeak.
In this condition both the DC and AC feedback are disabled and the SLIC line drivers operate as voltage
buffers. The ring waveform is obtained toggling the D2 control bit at the desired ring frequency. This bit in
fact controls the line polarity (0=direct; 1=reverse). As in the ACTIVE mode the line voltage transition is
performed with a ramp transition, obtaining in this way a trapezoidal balanced ring waveform (see fig.8).
The shaping is defined by the CREV external capacitor.
Selecting the proper capacitor value it is possible to get different crest factor values.
The following table shows the crest factor values obtained with a 20Hz and 25Hz ring frequency and with
1REN. These value are valid either with European or USA specification
Figure 8. TIP/RING Typical Ringing Waveform
Table 9. :
(*) Distorsion already less than 10%.
The ring trip detection is performed sensing the variation of the AC line impedance from on hook (relatively
high) to off-hook (low). This particular ring trip method allows to operate without DC offset superimposed
on the ring signal and therefore obtaining the maximum possible ring level on the load starting from a given
negative battery. It should be noted that such a method is optimised for operation on short loop applica-
tions and may not operate properly in presence of long loop applications (> 500
Ω ). Once ring trip is de-
tected, the DET output is activated (logic level low), at this point the card controller or a simple logic circuit
should stop the D2 toggling in order to effectively disconnect the ring signal and then set the STLC3055N
in the proper operating mode (normally ACTIVE).
3.2.4.1 Ring Level in Presence of More Telephone in Parallel
As already mentioned above the maximum current that can be drawn from the Vpos supply is controlled
and limited via the external RSENSE. This will limit also the power available at the self generated negative
battery.
If for any reason the ringer load will be too low the self generated battery will drop in order to keep the
power consumption to the fixed limit and therefore also the ring voltage level will be reduced.
In the typical application with RSENSE = 110m
Ω the peak current from Vpos is limited to about 900mA,
which correspond to an average current of 700mA max. In this condition the STLC3055N can drive up to
CREV
CREST FACTOR @20Hz
CREST FACTOR @25Hz
22nF
1.2
1.26
27nF
1.25
1.32
33nF
1.33
Not significant (*)
GND
TIP
RING
dV/dT set
by CREV
2.5V typ.
65V
typ.
VBAT
2.5V typ.



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