 |
Zakładka z wyszukiwarką danych komponentów |
|
|
Zakładka z wyszukiwarką danych komponentów |
|
M95256-R Arkusz danych(PDF) 15 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
M95256-R Arkusz danych(HTML) 15 Page - STMicroelectronics |
|
|
15 / 51 page  6.3.4 SRWD bit The Status register Write Disable (SRWD) bit is operated in conjunction with the Write protect (W) signal. The Status register Write Disable (SRWD) bit and Write protect (W) signal enable the device to be put in the Hardware Protected mode (when the Status register Write Disable (SRWD) bit is set to 1, and Write protect (W) is driven low). In this mode, the non-volatile bits of the Status register (SRWD, BP1, BP0) become read-only bits and the Write Status register (WRSR) instruction is no longer accepted for execution. Table 6. Status register format b7 b0 SRWD 0 0 0 BP1 BP0 WEL WIP Status register Write protect Block protect bits Write enable latch bit Write in progress bit M95256-W M95256-R M95256-DF Read Status register (RDSR) DS4712 - Rev 22 page 15/51 |
|
Link URL |
| Czy Alldatasheet okazała się pomocna? [ DONATE ] |
O Alldatasheet | Reklama | Kontakt | Polityka prywatności | Link do karty katalogowej | Linki | Lista producentów All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Polish ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
