5 Device Comparison Table

DEVICE

ORDERABLE PART

NUMBER

RATED OUTPUT

CURRENT

PEAK OUTPUT

CURRENT

(TRANSIENT

CONDITIONS)

JUNCTION TEMPERATURE RANGE

TLVM13610

TLVM13610RDFR

8 A

10 A

–40°C to 125°C

6 Pin Configuration and Functions

1

2

18

10

9

3

4

5

6

7

8

17

16

15

14

13

12

11

19

20

21

22

VIN

EN

NC

AGND

AGND

PG

RT

AGND

VOUT

AGND

AGND

PGND

PGND

RBOOT

CBOOT

VIN

SW

VLDOIN

VCC

AGND

FB

VOUT

Figure 6-1. 22-Pin B3QFN RDF Package (Top View)

Table 6-1. Pin Functions

PIN

TYPE(1)

DESCRIPTION

NO.

NAME

1, 18

VIN1, VIN2

P

Input supply voltage. Connect the input supply to these pins. Connect input capacitors between these

pins and PGND in close proximity to the device.

2

RBOOT

I

External bootstrap resistor connection. RBOOT is brought out to use in conjunction with CBOOT to

effectively lower the value of the internal series bootstrap resistance to adjust the switch-node slew rate,

if necessary. A resistance from 0 to 500 Ω can be connected between RBOOT and CBOOT. A resistance

of 0 Ω has the fastest slew rate and highest efficiency. A value of 100 Ω creates a nice balance between

efficiency and EMI. Leaving open sets the slew rate to 20 ns and TI does not recommend due to

increased self heating.

3

CBOOT

O

Bootstrap pin for the internal high-side gate driver. A 100-nF bootstrap capacitor is internally connected

from this pin to SW within the module to provide the bootstrap voltage. CBOOT is brought out to use

in conjunction with RBOOT to effectively lower the value of the internal series bootstrap resistance to

adjust the switch-node slew rate, if necessary.

4

SW

O

Switch node. Do not place any external component on this pin or connect to any signal. The amount of

copper placed on this pin must be kept to a minimum to prevent issues with noise and EMI.

5

VLDOIN

P

Input bias voltage. Input to the internal LDO that supplies the internal control circuits. Connect to an

output voltage point to improve efficiency. Connect an optional high-quality 0.1-μF to 1-μF capacitor from

this pin to ground for improved noise immunity.

6

VCC

P

Internal LDO output. Used as a supply to the internal control circuits. Do not connect to any external

loads. A 1-μF capacitor internally connects from VCC to AGND.

7, 11, 14,

15, 21,

22

AGND

G

Analog ground. Zero-voltage reference for internal references and logic. All electrical parameters are

measured with respect to these pins. These pins must be connected to PGND. See Layout Example for

a recommended layout.

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TLVM13610

SLVSH63 – FEBRUARY 2023

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