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74LVC10AD Arkusz danych(PDF) 4 Page - NXP Semiconductors

Numer części 74LVC10AD
Szczegółowy opis  Triple 3-input NAND gate
PDF  8 Pages
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Producent  PHILIPS [NXP Semiconductors]
Strona internetowa  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74LVC10AD Arkusz danych(HTML) 4 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74LVC10A
Triple 3-input NAND gate
1998 Apr 28
4
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40
°C to +85°C
UNIT
MIN
TYP1
MAX
V
HIGH level Input voltage
VCC = 1.2V
VCC
V
VIH
HIGH level Input voltage
VCC = 2.7 to 3.6V
2.0
V
V
LOW level Input voltage
VCC = 1.2V
GND
V
VIL
LOW level Input voltage
VCC = 2.7 to 3.6V
0.8
V
VCC = 2.7V; VI = VIH or VIL; IO = –12mA
VCC*0.5
VO
HIGH level output voltage
VCC = 3.0V; VI = VIH or VIL; IO = –100µA
VCC*0.2
VCC
V
VOH
HIGH level output voltage
VCC = 3.0V; VI = VIH or VIL; IO = –12mA
VCC*0.6
V
VCC = 3.0V; VI = VIH or VIL; IO = –24mA
VCC*1.0
VCC = 2.7V; VI = VIH or VIL; IO = 12mA
0.40
VOL
LOW level output voltage
VCC = 3.0V; VI = VIH or VIL; IO = 100µA
0.20
V
VCC = 3.0V; VI = VIH or VIL; IO = 24mA
0.55
II
Input leakage current
VCC = 3.6V; VI = 5.5V or GND
"0.1
"5
µA
ICC
Quiescent supply current
VCC = 3.6V; VI = VCC or GND; IO = 0
0.1
10
µA
∆ICC
Additional quiescent supply current per
input pin
VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 0
5
500
µA
NOTE:
1. All typical values are at VCC = 3.3V and Tamb = 25°C.
AC CHARACTERISTICS
GND = 0 V; tr = tf v 2.5 ns; CL = 50 pF
LIMITS
SYMBOL
PARAMETER
WAVEFORM
VCC = 3.3V ±0.3V
VCC = 2.7V
UNIT
MIN
TYP1
MAX
MIN
MAX
tPHL/
tPLH
Propagation delay
nA, nB, nC to nY
Figures 1, 2
1.5
3.9
5.7
1.5
6.7
ns
NOTE:
1. These typical values are at VCC = 3.3V and Tamb = 25°C.
AC WAVEFORMS
VM = 1.5 V at VCC w 2.7 V
VM = 0.5 S VCC at VCC < 2.7 V
VOL and VOH are the typical output voltage drop that occur with the
output load.
SV00420
VM
nA, nB, nC
INPUT
nY OUTPUT
VM
t PLH
t PHL
GND
VI
VOL
VOH
Figure 1. Input (nA, nB, nC) to output (nY)
propagation delays.
TEST CIRCUIT
SWITCH POSITION
PULSE
GENERATOR
RT
VI
D.U.T.
VO
CL
VCC
500
Ω
Open
GND
S1
VCC
VI
< 2.7V
VCC
TEST
S1
tPLH/tPHL
Open
2.7V
2.7–3.6V
50pF
500
Ω
2 * VCC
SV00903
Figure 2. Load circuitry for switching times.



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