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80KSW0004 Arkusz danych(PDF) 24 Page - Renesas Technology Corp |
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80KSW0004 Arkusz danych(HTML) 24 Page - Renesas Technology Corp |
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24 / 48 page ![]() 24 of 47 March 31, 2008 IDT80KSW0004 Datasheet Table 21 Receiver AC Timing Specifications - 1.25 GBaud NOTE: 1. Total jitter is composed of three components, deterministic jitter, random jitter and single frequency sinusoidal jitter. The sinusoidal jitter may have any amplitude and frequency in the unshaded region of Figure 16. The sinusoidal jitter component is included to ensure margin for low frequency jitter, wander, noise, crosstalk and other variable system effects. Table 22 Receiver AC Timing Specifications - 2.5 GBaud NOTE: 1. Total jitter is composed of three components, deterministic jitter, random jitter and single frequency sinusoidal jitter. The sinusoidal jitter may have any amplitude and frequency in the unshaded region of Figure 16. The sinusoidal jitter component is included to ensure margin for low frequency jitter, wander, noise, crosstalk and other variable system effects. Symbol Parameter Range Unit Notes Min Max VIN Differential Input Votlage 200 1600 mV p-p Measured at receiver JD Deterministic Jitter Tolerance 0.37 - UI p-p Measured at receiver JDR Combined Deterministic and Random Jitter Tolerance 0.55 - UI p-p Measured at receiver JT Total Jitter Tolerance(1) 0.65 - UI p-p Measured at receiver SMI Multiple Input Skew - 24 ns Skew at the receiver input between lanes of a multi- lane link BER Bit Error Rate 10-12 UI Unit Interval 800 800 ps +/- 100 ppm Symbol Parameter Range Unit Notes Min Max VIN Differential Input Votlage 200 1600 mV p-p Measured at receiver JD Deterministic Jitter Tolerance 0.37 - UI p-p Measured at receiver JDR Combined Deterministic and Random Jitter Tolerance 0.55 - UI p-p Measured at receiver JT Total Jitter Tolerance(1) 0.65 - UI p-p Measured at receiver SMI Multiple Input Skew - 24 ns Skew at the receiver input between lanes of a multi- lane link BER Bit Error Rate 10-12 UI Unit Interval 400 400 ps +/- 100 ppm |
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