For a CMOS regulator, the dropout voltage is determined by the drain-source on-state resistance (RDS(ON)) of the

pass transistor. Therefore, if the linear regulator operates at less than the rated current, the dropout voltage for

that current scales accordingly. The following equation calculates the RDS(ON) of the device.

R

=

DS(ON)

V

DO

I

RATED

(1)

7.3.3 Current Limit

The device has an internal current limit circuit that protects the regulator during transient high-load current faults

or shorting events. The current limit is a brick-wall scheme. In a high-load current fault, the brick-wall scheme

limits the output current to the current limit (ICL). ICL is listed in the Electrical Characteristics table.

The output voltage is not regulated when the device is in current limit. When a current limit event occurs, the

device begins to heat up because of the increase in power dissipation. When the device is in brick-wall current

limit, the pass transistor dissipates power [(VIN – VOUT) × ICL]. If thermal shutdown is triggered, the device

turns off. After the device cools down, the internal thermal shutdown circuit turns the device back on. If the

output current fault condition continues, the device cycles between current limit and thermal shutdown. For more

information on current limits, see the Know Your Limits application note.

Figure 7-1 shows a diagram of the current limit.

VOUT(NOM)

0 V

0 mA

VOUT

ICL

IRATED

IOUT

Brickwall

Figure 7-1. Current Limit

7.3.4 Undervoltage Lockout (UVLO)

The device has an independent undervoltage lockout (UVLO) circuit that monitors the input voltage, allowing a

controlled and consistent turn on and off of the output voltage. To prevent the device from turning off if the input

drops during turn on, the UVLO has hysteresis as specified in the Electrical Characteristics table.

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LP2985

SLVS522Q – JULY 2004 – REVISED DECEMBER 2022

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