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D90N03L Arkusz danych(PDF) 10 Page - STMicroelectronics |
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D90N03L Arkusz danych(HTML) 10 Page - STMicroelectronics |
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10 / 16 page ![]() STD90N03L - STD90N03L-1 10/16 Table 7. Power losses calculation High Side Switching (SW1) Low Side Switch (SW2) Pconduction Pswitching Zero voltage switching Pdiode Recovery (1) Not applicable Conduction Not applicable Pgate(QG) PQoss 1. Dissipated by SW1 during turn-on Table 8. Paramiters meaning Parameter Meaning d Duty-cycle Qgsth Post threshold gate charge Qgls Third quadrant gate charge Pconduction On state losses Pswitching On-off transition losses Pdiode Conduction and reverse recovery diode losses Pgate Gate drive losses PQoss Output capacitance losses δ * I * R 2 L DS(on)SW1 ) 1 ( * I * R 2 L DS(on)SW2 δ − g L I I * f * ) Q (Q * V gd(SW1) gsth(SW1) in + f * Q * V rr(SW2) in f * t * I * V deadtime L f(SW2) f * V * Q gg g(SW1) f * V * Q gg gls(SW2) 2 f * Q * V oss(SW1) in 2 f * Q * V oss(SW2) in |
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