ICS8523CGI REVISION E NOVEMBER 15, 2012

2

©2012 Integrated Device Technology, Inc.

ICS8523I Data Sheet

LOW SKEW, 1-TO-4, DIFFERENTIAL-TO-HSTL FANOUT BUFFER

Table 1. Pin Descriptions

NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.

Table 2. Pin Characteristics

Number

Name

Type

Description

1

GND

Power

Power supply ground.

2

CLK_EN

Input

Pullup

Synchronizing clock enable. When HIGH, clock outputs follow clock input.

When LOW, Qx outputs are forced low, nQx outputs are forced high.

LVCMOS / LVTTL interface levels.

3

CLK_SEL

Input

Pulldown

Clock select input. When HIGH, selects differential PCLK, nPCLK inputs. When

LOW, selects CLK, nCLK inputs. LVCMOS / LVTTL interface levels.

4

CLK

Input

Pulldown

Non-inverting differential clock input.

5

nCLK

Input

Pullup

Inverting differential clock input.

6

PCLK

Input

Pulldown

Non-inverting differential LVPECL clock input.

7

nPCLK

Input

Pullup

Inverting differential LVPECL clock input.

8, 9

nc

Unused

No connect.

10

VDD

Power

Positive supply pin.

11, 12

nQ3, Q3

Output

Differential output pair. HSTL interface levels.

13, 18

VDDO

Power

Output supply pins.

14, 15

nQ2, Q2

Output

Differential output pair. HSTL interface levels.

16, 17

nQ1, Q1

Output

Differential output pair. HSTL interface levels.

19, 20

nQ0, Q0

Output

Differential output pair. HSTL interface levels.

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

CIN

Input Capacitance

4pF

RPULLUP

Input Pullup Resistor

51

k



RPULLDOWN

Input Pulldown Resistor

51

k

