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VL-FS-MDLS16166D-01 Arkusz danych(PDF) 11 Page - Varitronix international limited |
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VL-FS-MDLS16166D-01 Arkusz danych(HTML) 11 Page - Varitronix international limited |
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11 / 12 page ![]() VL-FS-MDLS16166D-01 REV. A (MDLS16166(33)-LV-G-LED01G (DIE FORM IC)) JAN./2002 PAGE 11 OF 12 4.4 Timing Diagram of VDD against V0. Power on sequence shall meet the requirement of Figure 4, the timing diagram of VDD against V0. VDD 0V OV V0 95% 50ms(typical) LOGIC SUPPLY VOLTAGE LCD SUPPLY VOLTAGE Figure 4: Timing diagram of VDD against V0. |
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